1. Technical Field
Various embodiments generally relate to a degradation detection circuit and a degradation adjustment apparatus including the same. More particularly, various embodiments relate to a degradation detection circuit having a configuration for detecting the delay of an element degraded by an electrical stress and a degradation adjustment apparatus including the same.
2. Related Art
As properties of a semiconductor device deteriorate in response to temperature or electrical stresses the semiconductor device may fail to perform as expected. Therefore, in order to estimate the reliability of a semiconductor device, an electrical stress or a temperature stress may be optionally applied at an initial fabrication stage of a semiconductor device to detect the possible occurrence of a fail.
However, despite not detecting a fail at an initial fabrication stage, degradation may be induced in a semiconductor device after an electrical stress is applied due to a burn-in test or the like. In this case, the timing margin of an internal operation of the semiconductor device may be distorted due to an increase in the delay amount of an element such as a transistor. If the operation timing margin is distorted, the operational reliability of the entire semiconductor device may not be ensured.